RFP, DMEA Building 2 Consulting and Mgmt Support, SOO 25-5A3
ID: HQ072725RRC01Type: Combined Synopsis/Solicitation
Overview

Buyer

DEPT OF DEFENSEDEFENSE MICROELECTRONICS ACTIVITY (DMEA)DEFENSE MICROELECTRONICS ACTIVITYMCCLELLAN, CA, 956522100, USA

NAICS

Engineering Services (541330)

PSC

NATIONAL DEFENSE R&D SVCS; DEFENSE-RELATED ACTIVITIES; R&D FACILITIES & MAJ EQUIP (AC35)
Timeline
    Description

    The Defense Microelectronics Activity (DMEA) of the Department of Defense is soliciting proposals for consulting and management support related to the assessment of cleanroom manufacturing space in Building 2, under Request for Proposal SOO 25-5A3. The primary objective is to conduct a comprehensive evaluation of the current facility, including identifying improvement costs, operational and maintenance expenses, and timelines necessary to bring the cleanroom to operational status, particularly for Silicon Carbide (SiC) technology applications. This initiative is crucial for enhancing the DoD's capabilities in semiconductor manufacturing, specifically for high-efficiency power devices, and involves compliance with relevant regulations and standards. Proposals are due by January 22, 2025, at 2:00 PM Pacific Time, and interested firms should direct inquiries to Robert Crandell at robert.d.crandell.civ@mail.mil.

    Point(s) of Contact
    Files
    Title
    Posted
    The Defense Microelectronics Activity (DMEA) has issued a Request for Proposal (RFP) for the assessment of manufacturing cleanroom space at Building 2, under the combined synopsis/solicitation SOO 25-5A3. The RFP, directed to commercial service providers, is not set aside for small businesses and follows the Federal Acquisition Regulation (FAR) part 13 Simplified Acquisition Procedures. Interested bidders can submit their technical and pricing proposals by 22 January 2025, with Robert Crandell designated as the sole point of contact for inquiries. Attached to the solicitation are the Statement of Objectives and Proposal Instructions, which detail the requirements and evaluation criteria. The document enumerates various applicable FAR and Defense Federal Acquisition Regulation (DFARS) clauses, emphasizing compliance with cybersecurity and procurement regulations. This solicitation aims to procure services for the assessment and optimization of cleanroom facilities, facilitating the production of printed circuit boards (PCBs) and aligning with specified technical data packages and government-furnished materials. The detailed attachment list reflects the importance of standards and regulatory adherence in defense-related contracting environments.
    The Defense Microelectronics Activity (DMEA) is soliciting proposals for a project involving the assessment of cleanroom manufacturing space, as indicated in Request for Proposal SOO 25-5A3, dated December 12, 2024. This combined synopsis/solicitation invites commercial service proposals under Simplified Acquisition Procedures per FAR Part 13 and is open to all offerors, as it is not set aside for small businesses. Interested parties can submit quotes for printed circuit boards (PCBs) based on individual Statements of Work (SOW) and technical data packages. Proposals are due by January 22, 2025, at 2:00 PM Pacific Time. All inquiries must be directed to Contracting Officer Robert Crandell. The solicitation includes relevant terms, conditions, and mandatory clauses compliant with Federal Acquisition Regulations, and several support documents accompany it. The emphasis on commercial services and the absence of small business set-asides highlights the program's broader competitive landscape aimed at enhancing government manufacturing capabilities.
    The DMEA's Statement of Objectives (SOO) details the assessment of cleanroom manufacturing space within DMEA Building 2, focusing on Silicon Carbide (SiC) fabrication capabilities for Department of Defense (DoD) applications. The project seeks to establish the costs and timelines necessary to enhance existing facilities into an operational cleanroom, specifically targeting thick epitaxial films required for high voltage devices. DMEA plans to reactivate approximately 20,000 sq. ft. of currently idle cleanroom space to comply with necessary regulations and standards, including ISO Class 3 cleanroom specifications. Key requirements include remediation of existing infrastructure, installation of specific equipment for SiC epitaxy and high-temperature ion implantation, and compliance with local and state regulations. A baseline assessment will identify existing deficiencies, while future expansion opportunities include additional manufacturing capabilities. The document emphasizes a comprehensive approach to project management, including regular technical meetings and detailed reporting to ensure alignment with DoD objectives and regulatory compliance throughout the process.
    The document outlines the proposal instructions and evaluation criteria for Offerors responding to a federal solicitation (SOO 25-5A3). Key requirements include registration with the System for Award Management (SAM) and an emphasis on submitting comprehensive proposals without expecting government discussions or clarifications. Offerors must provide a Technical Volume showcasing capabilities in engineering design and construction management of semiconductor facilities, a Past Performance Volume (optional but preferred), and a Price Volume corresponding to deliverables. The evaluation criteria prioritize Technical aspects and Past Performance over Price. A two-phase evaluation process will confirm capabilities and assess proposals for technical risk. The award will be based on the proposal's alignment with the solicitation's objectives, though the government retains negotiation rights. Overall, the document ensures that submissions are thorough, accurate, and structured, reflecting the importance of demonstrated experience and detailed pricing in federal contracting.
    The Defense Microelectronics Activity (DMEA) is seeking market research input for consulting and management support related to the assessment of Building 2, outlined in the Statement of Objectives (SOO) 25-5A3. Contractors are invited to a site visit on November 19, 2024, to familiarize themselves with the environment and ask questions. Interested parties must respond by December 3, 2024, providing information regarding their business size, pricing estimates, applicable government contracts, potential issues with the SOO, and any questions they may have. The RFI requests particular documentation to ensure security clearance for site visitors and affirms that foreign nationals cannot access DMEA facilities. It is emphasized that selected contractors for the assessment phase cannot subsequently implement the requirements. Following the site visit, a virtual Q&A is scheduled for November 22, 2024. This RFI serves as preliminary outreach before potential formal proposals are solicited under NAICS code 541330. Contractors are instructed to email their responses to the designated contracting officer.
    The Defense Microelectronics Activity (DMEA) seeks to evaluate and enhance the operational status of its Building 2 cleanroom space for semiconductor manufacturing, particularly focusing on Silicon Carbide (SiC) technology. This initiative aims to leverage SiC’s advantageous properties for Department of Defense (DoD) applications requiring high voltage and power efficiency. The project encompasses a comprehensive assessment of current facilities, identifying improvement costs and timelines necessary for compliance with relevant regulations. Key requirements include constructing thick epitaxial films, addressing infrastructure needs, and potentially expanding capabilities to include advanced semiconductor processes. The contractor will develop a detailed report including cost estimates for labor and materials, ensuring adherence to DoD policies and environmental standards. The overarching goal is to establish a fully functional cleanroom that meets DoD’s immediate demand for high-efficiency power devices, leveraging the newly available 20,000 sq. ft. space effectively. The project signifies a proactive investment towards future technological demands in semiconductor manufacturing related to national defense.
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