SBIRPre-Release

TEMPERATURE-HARDENED ELECTRONICS FOR RELIABLE MISSION-CRITICAL APPLICATIONS (THERMAL)

Solicitation ID26.BZ
Agency
DOD
DARPA
Deadline
Jun 24, 2026
45 days left
Posted Date
May 6, 2026
Classification
SBIR
Phase: BOTH

SBIR Opportunity Analysis

DARPA, within the Department of Defense, is seeking SBIR proposals for temperature-hardened mixed-signal electronics that can operate reliably in extreme heat for mission-critical defense and dual-use applications. The work focuses on developing a manufacturable wafer-based fabrication process for high-speed mixed-signal ICs, including proof-of-concept design and fabrication approaches, with Phase I centered on feasibility through modeling, simulation, and preferred experimental validation. Key technical targets include an amplifier with more than 20 dB DC gain and over 1 MHz unity-gain bandwidth at 800°C, a ring oscillator with less than 500 ns propagation delay at 800°C, and in Phase II an ADC that operates stably at 800°C with more than 10,000 samples per second, 8-bit resolution, under 1 W power, and SNR above 40 dB while scaling fabrication through at least one 4-inch lot every six months. The solicitation is pre-release, opens May 27, 2026, and proposals are due June 24, 2026 at 4:00 PM UTC.

SBIR Documents

1 Files
1778457813439.pdf
PDF48 KBMay 11, 2026
AI Summary
DARPA is soliciting proposals for the TEMPERATURE-HARDENED ELECTRONICS FOR RELIABLE MISSION-CRITICAL APPLICATIONS (THERMAL) project, an SBIR opportunity to develop manufacturable mixed-signal integrated circuits (ICs) capable of reliable operation in harsh, high-temperature environments up to 800°C. This initiative addresses the limitations of conventional silicon-based technologies and current wide-bandgap materials like SiC and GaN, which lack the speed, stability, and manufacturability for widespread deployment in defense, aerospace, and energy applications. The objective is to establish a scalable wafer-based fabrication process for high-speed, thermally resilient mixed-signal ICs. Phase I focuses on demonstrating design feasibility through modeling and simulation, with experimental validation of amplifier and ring oscillator performance at 800°C. Phase II aims to demonstrate an Analog-to-Digital Converter (ADC) capable of stable 800°C operation and mature the wafer fabrication process for scalability. Phase III involves commercializing the technology for dual-use applications, improving operating lifetime, and finalizing a Process-Design Kit (PDK) for standardized fabrication and broad adoption.

Related SBIR/STTR Opportunities

Opportunity Snapshot

Source SystemOfficial Link
Program Type
SBIR - BOTH
Agency
DOD / DARPA

Key Dates

Release DateMay 6, 2026
Open DateMay 27, 2026
Application DueJun 24, 2026
Close DateJun 24, 2026