Applications to Assist in Analysis and Re-Engineering of Printed Circuit Board Assemblies
ID: DMEA23C-P001Type: Phase I
Overview

Topic

Applications to Assist in Analysis and Re-Engineering of Printed Circuit Board Assemblies

Agency

Department of DefenseN/A

Program

Type: STTRPhase: Phase IYear: 2023

Topic Link

https://www.sbir.gov/node/2448121

Additional Information

https://www.defensesbirsttr.mil/
Timeline
  1. 1
    Release Aug 23, 2023 12:00 AM
  2. 2
    Open Sep 20, 2023 12:00 AM
  3. 3
    Next Submission Due Oct 18, 2023 12:00 AM
  4. 4
    Close Oct 18, 2023 12:00 AM
Description

The Department of Defense (DoD) is seeking proposals for the topic "Applications to Assist in Analysis and Re-Engineering of Printed Circuit Board Assemblies" as part of the DoD STTR 23.C BAA. The objective of this topic is to design and implement technologies that can assist in the process of extracting a printed circuit board (PCB) design non-destructively from a PCB assembly. The technologies can be purely software-based or include a hardware component.

The DoD relies heavily on microelectronics for its weapons systems, but sometimes lacks access to the technical design data for these microelectronics. The Defense Microelectronics Activity (DMEA) aims to analyze PCBs and circuit card assemblies (CCAs) to create a technical data package that includes a schematic, Gerber file, and bill of materials (BoM). The challenge lies in areas such as identifying passive component values, visual inspection of components, X-ray computed tomography (CT) of PCBs or CCAs, and generating a Gerber file that conforms to design rules.

DMEA is looking for technologies that can improve the existing PCB and CCA analysis workflows, addressing challenges or automating manual tasks.

In Phase I, the research should focus on technology that addresses one or more challenges associated with non-destructively generating a schematic, bill of materials, and/or Gerber file of a CCA. The end product of Phase I should be a feasibility study report that includes a clear description of the technology, any associated hardware required, and how to incorporate the technology into an overall workflow.

Phase II involves developing a prototype of the Phase I concept and demonstrating its operation, validating its performance in terms of scalability, capacity, cost, and time.

In Phase III, there may be opportunities for further development of the technology for specific military or commercial applications. The proposed technology will be applicable to both commercial and government fields that require an added level of security for their microelectronics parts.

The project duration and funding specifics are not provided in the document. For more information and to submit a proposal, interested parties can visit the DoD STTR 23.C BAA topic link: link.

Files
No associated files provided.
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